Digital Systems: Principles and Design

310

Digital Systems

TABLE 13.13 SOPs map in a circuit

CD

C D C

DCDC

D

AB 00 01 11 10

A B

00 1 1 1 1

A

B 01 1

AB 11 1

AB 10

TABLE 13.14 SOPs map in a circuit

CD

C D C

DCDC

D

AB 00 01 11 10

A

B 00 1

A

B 01 X

AB 11 1 1 X

AB 10 1 1 1

5. Show how to program the fusible links to get the four Boolean expressions corre-

spond to the given sets of four combinational circuits in Exercise 3 implemented

using PROM.

6. Show how will we design a hardware lock from a four input variable PAL having

four number eight input AND gates and four OR gates. Lock opens ad generates

output = 1 when input variables are 10111101 and OR outputs Y

0

to Y

7

are all 1s.

QUESTIONS

1. Describe the fusible links ...