Digital Systems: Principles and Design

425RAM, Address and Data Buses, Memory Decoding, Semiconductor Memories

17.4 INTERNAL ADDRESS DECODER IN A RAM

Suppose j = 0, 1,, 2047 in a 2k ´ 8 memory. It is not possible to have 2048 external inputs

to active one byte read or write. There is a internal decoder. The decoder has only m-input

address lines actives one output at an instance out of 2

m

outputs. For 2048 byte addresses

(2k) at the RAM, external inputs m = 11. For 4096 byte addresses (4k) m = 12, When m =

20, 1024 ´ 1024 (1M) byte addresses at the RAM can be accessed. When m = 32, 4 ´ 1024

´ 1024 ´ 1024 (= 4G) byte address inputs to the internal decoder of a RAM are needed. A

single chip ...