October 2006
Intermediate to advanced
544 pages
20h 23m
English
Content preview from Digital Systems: Principles and Design
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151Different Types of Logic Gates
6.9.5 Calculation of Power Dissipation
When n-channel is ON, the p-channel is OFF and when n-channel is OFF, the p-channel is
ON. It means the D.C. (steady state) current dissipation between the supply ends is very
small as the series resistance is always very high. Current will flow only during the
transitions from 0 to 1 or 1 to 0. Power will dissipate only during the transitions from 0 to 1
or 1 to 0. Therefore, unlike like TTL and NMOS, the CMOS logic gates dissipates very little
power compared to NMOSs and TTLs and dissipate power only at the transitions of logic
states, not in d.c. state.
6.9.6 CMOS
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