October 2006
Intermediate to advanced
544 pages
20h 23m
English
Content preview from Digital Systems: Principles and Design
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163Different Types of Logic Gates
16. A typical VLSI CMOS logic circuit dissipates 50 nW static, 0.6 nW/MHz. What
will be the power dissipated at 500 MHz operation if at a given instant maximum
1000 gate circuit is operational?
QUESTIONS
1. Why is the DTL circuit considered as better logic circuit than RTL?
2. Compare the fan-out, turn-on delay times, turn-off delay times and power dissipated
per gate in circuits of RTL, DTL, HTL and TTL?
3. What are the advantages that can be obtained by an open collector TTL?
4. An I
2
L circuit needs minimum silicon area in an IC? Why?
5. Compare modified DTL circuit operation with that of DTL.
6. Draw into four circuits ...
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