GPU Pro 6

2

I

Bandwidth-Efficient Procedural

Meshes in the GPU via

Tessellation

Gustavo Bastos Nunes and Jo˜ao Lucas

Guberman Raza

2.1 Introduction

Memory bandwidth is still a major bottleneck in current off-the-shelf graphics

pipelines. To address that, one of the common mechanisms is to replace bus con-

sumption for arithmetic logic unit (ALU) instructions in the GPU. For example,

procedural textures on the GPU mitigate this limitation because there is little

overhead in the communication between CPU and GPU. With the inception of

DirectX 11 and OpenGL 4 tessellator stage, we are now capable of expanding pro-

cedural scenarios into a new one: procedural meshes in