Parallel Computer Architecture

5.8 Exercises 367

of options are available to the system architect, including the set of states associated

with cache blocks, the bus transactions and actions used, the choice of cache block

size,

and whether updates or invalidations are used. The key task of the system

architect is to make choices that will both perform well on the data sharing patterns

expected in workloads and make the task of implementation easier. Another chal-

lenge is the design and implementation of efficient synchronization techniques that

are both high performance and flexible.

As processor, memory system, integrated circuit, and packaging technology con-

tinue to mak ...