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Parallel Computer Architecture
book

Parallel Computer Architecture

by David Culler, Jaswinder Pal Singh, Anoop Gupta
September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Morgan Kaufmann
Content preview from Parallel Computer Architecture
12.1 Technology and Architecture 941
faster with more storage, but it is still several chips with connectors and PC board
traces.
Indeed, from 1987 to 1997, the footprint of a basic processor and memory
module did not shrink much. There was an improvement from two nodes per board
to about four when first-level caches moved on chip and DRAM chips were turned
on their side as SIMMs, but most designs maintained one level of cache off chip.
Even if the off-chip caches are eliminated (as in the CRAY T3D and T3E), the pro-
cessor chip consumes more power with each generation, and a substantial amount
of surface area is needed to dissipate the heat ...
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Publisher Resources

ISBN: 9780080573076