September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Content preview from Parallel Computer Architecture
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768 CHAPTER 10 Interconnection Network Design
Many evaluations of networks treat the switch degree as its cost. This is clearly a
major factor, but again there is room for debate. The cost of some parts of the switch
is linear in the degree, for example, the transmitters, receivers, and port buffers.
However, the internal interconnect cost may increase with the square of the degree.
The amount of internal buffering and the complexity of the routing logic also
increase more than linearly with the degree. With recent VLSI switches, the domi-
nant constraint tends to be the number of pins, which is proportional to the number
of ports times the
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