September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Content preview from Parallel Computer Architecture
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420 CHAPTER 6 Snoop-Based Multiprocessor Design
has not finished its snoop by this cycle, it indicates so by asserting the correspond-
ing inhibit line. (The data resource ID lines double as inhibit lines during the
acknowledgment and arbitration cycles.) It continues to assert this line until it has
finished the snoop. If the snoop indicates a clean cache block, the snooping node
simply drops the inhibit line and allows the requesting node to accept the memory's
response. If the snoop indicates a dirty block, the node rearbitrates for the data bus,
supplies the latest copy of the data, and only then drops the inhibit line.
For data bus transactions ...
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