September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Content preview from Parallel Computer Architecture
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784 CHAPTER 10 Interconnection Network Design
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Dimension (d)
FIGURE 10.15 Unloaded latency for fr-ary c/-cubes with equal bisection width (n =
40 B, Ä = 2). The balance between routing delay and channel time shifts even more in
favor of low-degree networks with an equal bisection width scaling rule.
the wires are not pipelined, then the cycle time of the network is increased as a
result of the time to drive the wire, which is logarithmic in the wire length.
The embedding of the d-dimensional network into few physical dimensions
introduce ...
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