Parallel Computer Architecture

278 CHAPTER 5 Shared Memory Multiprocessors

Bus

snoop

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K

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Mem

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Cache-memory

I/O devices transaction

FIGURE 5.4 A snooping cache-coherent multiprocessor. Multiple processors with

private caches are placed on a shared bus. Each processor's cache controller continuously

"snoops" on the bus watching for relevant transaction and updates its state suitably to

keep its local cache coherent. The gray arrows show the transaction being placed on the

bus and accepted by main memory, as in a uniprocessor system. The black arrow indicates

the snoop.

fact appear on the bus, in response to memory operations, and that the controllers

take the appropriat ...