Parallel Computer Architecture

378 CHAPTER 6 Snoop-Based Multiprocessor Design

in processing individual transactions are outlined. This section assumes an invalida-

tion protocol for concreteness, but the main issues apply directly to update proto-

cols as well. Section 6.3 expands this design to address multilevel cache hierarchies,

showing how protocol events propagate up and down the hierarchy. Section 6.4

expands the base design to utilize a split-transaction bus. In such a bus, a bus trans-

action is split into request and response phases that arbitrate for the bus separately

so multiple transactions can be outstanding at a time on the bus and can be handled

in a pipeline ...