September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Content preview from Parallel Computer Architecture
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672 CHAPTER 8 Directory-Based Cache Coherence
8;12 EXERCISES
8.1 What are the inefficiencies and efficiencies in emulating message passing on a cache-
coherent machine compared to the kinds of machines discussed in Chapter 7?
8.2 a. For which of the case study parallel applications used in this book do you
expect a substantial advantage in using multiprocessor rather than uniproces-
sor nodes (assuming the same total number of processors)? For which do you
think there might be disadvantages, and under what circumstances?
b.
How might your answer to the previous question differ with increasing scale
of the machine? That is, how do you expect th ...
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