September 1998
Intermediate to advanced
1056 pages
55h 28m
English
Content preview from Parallel Computer Architecture
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518 CHAPTER 7 Scalable Multiprocessors
queues, and data transfer buffers. Each page of the NIC memory space is indepen-
dently mapped by the host virtual memory system. Thus, the NIC processor code
and data space can be made accessible only to the kernel. The remaining communi-
cation space can be partitioned into several disjoint communication regions. By con-
trolling the mapping of these communication regions, several user processes can
have communication endpoints that are resident on the NIC, each containing message
queues and associated data transfer areas (Chun, Mainwaring, and Culler 1998). In
addition, a collection of host memory frame ...
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