Parallel Computer Architecture

7.4 User-Level Access 491

separate regions of memory. Typically, the controller has a single port into the net-

work, so it pushes the message onto the wire. For Ethernets and rings, each of the

controllers inspects the message as it comes by, so a destination address is specified

on the transaction rather than a route.

The inbound side is more interesting. Each receive descriptor has a destination

buffer address. When a message arrives, a buffer descriptor is popped off the queue,

and a DMA transfer is initiated to load the message data into the associated region of

memory. If no receive descriptor is available, the message is dropped, and