Parallel Computer Architecture

310 CHAPTER

5

Shared Memory Multiprocessors

NP (not present), is introduced. This addition helps clarify transitions where, on a

cache miss, one block is replaced (creating a transition from one of

1,

E, S, or M to

NP) and a new block is brought in (creating a transition from NP to one of I, E, S, or

M).

The sum of state transitions can be greater than 1,000 even though we are pre-

senting averages per 1,000 references because some references cause multiple state

transitions. For example, a write miss can cause two transitions in the local proces-

sor's cache (e.g., S -» NP for the old block and NP -» M for the incoming block), in

addition t