Parallel Computer Architecture

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CHAPTER

11 Latency Tolerance

number of lookahead bits provided is influenced by the high premium on bits in the

instruction word, by the ability of the compiler to utilize more lookahead, and par-

ticularly by the register pressure introduced by having three results per instruction

times the number of lookahead instructions; more lookahead and greater register

pressure might have been counterproductive for instruction scheduling.

Each "instruction" or cycle in Horizon can include up to three operations, one of

which may be a memory operation. This means that 21 independent operations

must be found to achieve the maximum lookahead, so sophisticate ...