On-Chip Communication Architectures

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A technique to automatically generate the pre-fetch unit to satisfy user-imposed

register constraints was proposed by the authors in an extension to this work

in [82]. The proposed approach performs pre-fetch scheduling to trade-off per-

formance with power consumption—updating pre-fetch registers frequently

increases power consumption but potentially improves performance due to

greater number of hits, whereas less frequent pre-fetch register updates save

power, but do not provide as much performance gain. Two major techniques,

based on real-time scheduling, and Petri Net dependency models were proposed

to create a balanced schedule for pre-fetch ...