On-Chip Communication Architectures

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bus confi gurations that are compared, and an arbitration latency of one cycle is

assumed. For fairness of comparison, it is assumed that the traditional bus archi-

tecture has two buses that can be used independently. Therefore, when the traffi c

on those buses is high enough, the effective bandwidth is two, as shown in Fig.

8.10. From Figs. 8.10 and 8.11 it can be seen that when the SAMBA bus is used,

the effective bandwidth is improved by as much as 3.5 times, while the latency is

reduced by up to 15 times.

8.2 SERIAL BUS ARCHITECTURES

Typical standard bus-based communication architectures [3–8, 14] have parallel-

line buses with multiple ...