
101
CHAPTER
On-chip communication architectures have numerous sources of delay due to
signal propagation along the wires, synchronization (e.g., handshaking), trans-
fer modes (e.g., pipeline access, burst transfer, etc.), arbitration mechanisms for
congestion management, cross-bridge transfers, and data packing/unpacking at
the interfaces. These communication delays can signifi cantly infl uence the per-
formance of system-on-chip (SoC) applications, and are in fact, a major cause of
bottlenecks in many designs. It is therefore important to consider these delays
when exploring SoC applications, in order to get an accurate estimation of the
system ...