On-Chip Communication Architectures

230 CHAPTER 6 Synthesis of On-Chip Communication Architectures

but rather at satisfying all TCP constraints and minimizing the implementation

cost of the synthesized architecture. Finally, and most importantly, the manual

approach suffers from the major drawback of taking several days to come up with

a bus architecture which is typically overdesigned and exceeds the requirements

(resulting in a more expensive system), whereas the automated FABSYN approach

generates a better quality architecture in a matter of a few hours.

6.5 MEMORY–COMMUNICATION ARCHITECTURE

CO-SYNTHESIS

The memory architecture contributes to a signifi cant amount of data ...