On-Chip Communication Architectures

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6.7 SUMMARY

Designing on-chip communication architectures is a non-trivial task, especially

in the face of the multi-faceted design constraints of performance, power, cost,

reliability, and area. Designers need techniques that can effi ciently explore the

increasingly intractable communication architecture design space, in order to sat-

isfy and optimize constraints during communication architecture design. In this

chapter, we presented research on techniques for effi cient bus-based communica-

tion architecture synthesis. Some of these techniques focus on either bus topol-

ogy design, or on the synthesis of bus protocol parameters such as ...