On-Chip Communication Architectures

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bus primarily because of its lower area footprint, while still offering an acceptable

bandwidth.

2.5 PHYSICAL IMPLEMENTATION OF BUS WIRES

With the rising complexity and ever increasing levels of component integration in

SoC designs, the volume of data transfers between components has also increased.

To meet performance requirements, bus clock frequencies have been steadily

increasing, since data throughput is a function of bus clock frequency, as given by

the relation:

throughput

bus

 width

bus

 clock_frequency

bus

where the throughput is in terms of megabits per second if the width is speci-

fi ed in terms of bits and ...