With the growing complexity of on-chip communication protocols, it is becoming
essential to verify the correctness of these protocols connecting intellectual prop-
erty (IP) blocks (components) in a system-on-chip (SoC), to ensure freedom from
bugs, and prevent deadlock or livelock conditions from arising during application
execution. The problem of on-chip communication protocol verifi cation is exacer-
bated by the observation that almost every communication protocol specifi cation
is documented informally, using natural languages (e.g., the 230 page AMBA 2.0 [1]
specifi cation document). It is quite common for these bulky specifi cation ...
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