On-Chip Communication Architectures

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Thus, knowing the leakage and dynamic power for one PVT corner at the sys-

tem level can allow a designer to obtain the power for other PVT corners using

a simple linear model with good accuracy, which speeds up power exploration

across corners considerably. Figure 5.24 shows how this technique can “ scale

up” and abstract the PVT variability at the system level, to provide a more real-

istic characterization of the design space, early in the design fl ow. The designer

can then select a design confi guration with greater confi dence, after analyzing its

behavior under PVT variations. This signifi cantly reduces the exploration and rede-

sign ...