July 2010
Intermediate to advanced
544 pages
22h 33m
English
Content preview from On-Chip Communication Architectures
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84 CHAPTER 3 On-Chip Communication Architecture Standards
routing resources. As a rule of thumb, a crossbar switch with two masters and two
slaves takes up twice the interconnect logic as a similar shared bus system with
the two masters and two slaves.
Wishbone supports the basic single read/write data transfers with handshak-
ing, and block (burst) read/write data transfers, like the other standards. Semaphore
type operations, that allow multiple components to share common resources, are
supported via the RMW operation. This type of operation is commonly used in disk
Wishbone
master
“MA”
Wishbone
slave
“SA”
Wishbone
slave
“SB”
Wishbone
slave
“SC”
Wishbone ...
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