On-Chip Communication Architectures

201

involving buses P and Q, and the difference in time (before and after the move) is

the potential gain of a move. The move with the maximum gain is selected, and

the procedure repeated iteratively, till no more gain is achievable.

The methodology proposed by Lahiri et al. [30, 31] was used to generate com-

munication architecture component mapping and protocols for two case studies:

(i) a cell forwarding unit of an output queued ATM switch, with a fi xed topology

having three buses connected by two bridges, and (ii) a simple communication

system (SYS) with two buses connected by a single bridge. Table 6.5 shows the

performance of the two ...