On-Chip Communication Architectures

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[71] schemes. Tu et al. [117] proposed a similar scheme utilizing the BI method

to reduce the on-chip bus delay due to coupling effects while inductance effects

dominate. The proposed BI-based method inverts the input data when the num-

ber of bits switching in the same direction is more than half of the number of

signal bits. Simulation results indicated that the proposed encoding method can

signifi cantly reduce the worst coupling delay of a bus. The encoding scheme is

recommended for cases when buses or parallel signal wires are about thousands

of micrometers long and work above GHz frequencies.

Raghunandan et al. [116] proposed an encoding ...