On-Chip Communication Architectures

18 CHAPTER 2 Bus-Based Communication Architectures

2.1 TERMINOLOGY

We begin by reviewing the basic terminology used to describe bus-based com-

munication architectures, and systems deploying these architectures. Figure 2.1

shows a simple SoC design in which several (computational) components are

interconnected using a bus-based communication architecture. Components

which initiate and control read and write data transfers are referred to as mas-

ters. The Processor and DSP ( digital signal processor) components in Fig. 2.1 are

examples of master components that read/write data from/to other components

in the system. Every master component ...