On-Chip Communication Architectures

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This profi le is useful for managing pipelined access of defi ned-length traf-

fi c (e.g., MPEG macro-blocks) to and from memory.

■ Sequential undefi ned length data fl ow profi le: Master type (read-only,

read–write, or write-only) interface for cores that communicate data

streams with memory.

■ Register access profi le: Supports programmable register interfaces across

a wide range of IP cores, such as simple peripherals, DMA, or register-

controlled processing engines. Offers a control processor the ability to

program the functionality of an attached component.

2. Bridging profi les: These profi les are meant to simplify or automate ...