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On-Chip Communication Architectures
book

On-Chip Communication Architectures

by Sudeep Pasricha, Nikil Dutt
July 2010
Intermediate to advanced
544 pages
22h 33m
English
Morgan Kaufmann
Content preview from On-Chip Communication Architectures
172 CHAPTER 5 Models for Power and Thermal Estimation
For wires at the edges,
PC
tR R
ii
ii
i
ii

d
d
inter
 ()( )
01
(5.39)
For wires in the middle,
PC
tR R
ii
ii
i
ii i



d
d
inter
  ()( )
011
2
(5.40)
where P
i
is the instantaneous power dissipated in the ith wire, and
i
is the ambi-
ent temperature (45°C or 318.15K). C
i
is the thermal capacitance per unit length
of the wire, given as:
CCtw
iii
s
()
(5.41)
where C
s
is the specifi c heat per unit volume of the metal, w
i
is the wire width,
and t
i
is the wire thickness, as shown in Fig. 5.19 . R
i
is the thermal resistance per
C
inter
C
inter
C
inter
C
inter
C
line
C
line
C
line
C
line ...
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Publisher Resources

ISBN: 9780123738929