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On-Chip Communication Architectures
book

On-Chip Communication Architectures

by Sudeep Pasricha, Nikil Dutt
July 2010
Intermediate to advanced
544 pages
22h 33m
English
Morgan Kaufmann
Content preview from On-Chip Communication Architectures
221
MEM1
CPU1
M2
MEM2b
S2
MEM3
M3
S3
S4
MEM2a
S1
FIGURE 6.26(b)
After splitting MEM2 — preprocess
© 2006 IEEE
MEM1
CPU1
M2
MEM2b
S2
MEM3
M3
S3
S4
MEM2a
S1
FIGURE 6.26(c)
Merging local slave/memory nodes to create hypernode— preprocess
© 2006 IEEE
be a partition of nodes V
CTG
in a CTG, such that B 傺 V
CTG
. Figure 6.26(d) shows
the mapped components on the main and peripheral bus partitions, for the pre-
processed CTG in Fig. 6.26(c) .
Once the simple topology has been created, the largest unsatisfi ed TCP con-
straint is selected from set and a search is initiated for a suitable combination of
communication parameter values to satisfy the ...
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ISBN: 9780123738929