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Designing SOCs with Configured Cores
book

Designing SOCs with Configured Cores

by Steve Leibson
August 2006
Intermediate to advanced
344 pages
9h 2m
English
Morgan Kaufmann
Content preview from Designing SOCs with Configured Cores

11.3. Diamond 330HiFi audio DSP Core Interfaces

As shown in Figure 11.4, the Diamond 330HiFi audio DSP core has a 64-bit implementation of the Xtensa PIF (main processor interface) bus and separate interfaces for the one local instruction RAM, two local data RAMs, and the 2-way set-associative instruction and data caches.

Figure 11.4. The Diamond 330HiFi audio DSP core has a 64-bit implementation of the Xtensa PIF (main processor interface) bus and separate interfaces for the one local instruction RAM, two local data RAMs, and the 2-way set-associative instruction and data caches.

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Publisher Resources

ISBN: 9780123724984