TSS Descriptor
The TSS descriptor is pictured in Figure 10-5 on page 186. A TSS descriptor may only reside in the GDT and describes the following characteristics of a task's TSS:
The 32-bit linear base address of the TSS.
The 20-bit Limit (i.e., the size) of the TSS.
The DPL of the TSS. A far CALL or a far jump instruction can cause a task switch if its CPL is at least as privileged as the TSS descriptor's DPL. The segment portion of the target address specified by the far CALL or far jump selects the entry in the GDT that contains the TSS descriptor. The offset portion of the branch target address is irrelevant and is discarded.
Whether the target task is currently busy (a detailed discussion of the Busy bit can be found in “The Busy Bit” on page ...
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