The Unabridged Pentium 4 IA32 Processor Genealogy

Chapter 52. Pentium® 4 FSB Transaction Deferral

The Previous Chapter

This chapter provided a detailed description of the Response and Data Phases of a FSB transaction. It included:

• The Purpose of the Response Phase.

• The Response Phase Signal Group.

• The Response Phase Start Point.

• The Response Phase End Point.

• The Response Types.

• The Response Phase May Complete a Transaction.

• The Data Phase Signal Group.

• Five Example Scenarios.

• Data Phase Wait States.

• The Response Phase Parity.

• Data Bus Parity.

This Chapter

This chapter provides a detailed description of the Deferred Transaction mechanism. It includes:

• The Problem.

• Example Read From a PCI Express Device.

• The Read Receives the Deferred Response.

• The Root Complex Performs the Read.

• The Root Complex Issues a Deferred ...