O'Reilly logo

The Unabridged Pentium 4 IA32 Processor Genealogy by Bob Colwell, Tom Shanley

Stay ahead with the world's most comprehensive technology and business learning platform.

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, tutorials, and more.

Start Free Trial

No credit card required

The L2 ATC

Introduction

The L2 Cache is often referred to as the Advanced Transfer Cache (ATC). It has the following major characteristics:

  • It is a unified cache (i.e., it caches both code and data and does not discriminate between the two).

  • It has a net load-use access latency of seven clock cycles.

  • A new cache operation can begin every two processor clock cycles.

  • It is physically addressed and physically tagged.

  • 128KB, 256KB, 512KB, or 1MB in size.

  • It is an 8-way set associative cache.

  • It is a Write-Back (MESI) cache.

  • The cache line size is 128 bytes, with each line divided into two 64 byte sectors.

  • It is a non-blocking cache.

  • It can cache from the full 64GB physical memory space.

  • ECC-protected. It can detect and correct single bit failures and detect ...

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, interactive tutorials, and more.

Start Free Trial

No credit card required