July 2004
Intermediate to advanced
1744 pages
35h 3m
English
The external signals associated with the Pentium® Pro and Pentium® II processors differ as described in Table 26-1 on page 679.
| Signal(s) | Description |
|---|---|
| BR[3:0]# | While the Pentium® Pro processor implemented BR[3:0]#, the Pentium® II processor only implemented BR[1:0]#. For additional information, refer to “The FSB Arbitration Scheme” on page 676. |
| BSEL# | Bus Select. Output. Tells the frequency generator on the system board the frequency of the BCLK desired by the processor. The frequency was defined by the combination of the processor, chipset and clock synthesizer. |
| EMI | Electromagnetic Interference. The Slot 1 connector included ... |
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