July 2004
Intermediate to advanced
1744 pages
35h 3m
English
Content preview from The Unabridged Pentium 4 IA32 Processor GenealogyBecome an O’Reilly member and get unlimited access to this title plus top books and audiobooks from O’Reilly and nearly 200 top publishers, thousands of courses curated by job role, 150+ live events each month,
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Uniprocessor vs. Multiprocessor Bus
The FSB utilized on IA32 processors prior to the advent of the P6 processor family was ill-suited in a platform wherein multiple processors reside on the FSB (see Figure 44-1 on page 1140).
The Pentium® Pro FSB was specifically designed to support multiple processors on the same bus, and the Pentium® 4/M FSB is a derivative of the P6 FSB. The following major changes were made:
In a typical Pentium® 4/M FSB environment, up to 12 transactions can simultaneously be in progress at various stages of completion.
If the target of a transaction (i.e., the Response Agent) cannot deal with a new transaction right now (e.g., due to a temporary logic busy condition), rather than tie up the bus by inserting wait states, ...
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