July 2004
Intermediate to advanced
1744 pages
35h 3m
English
Content preview from The Unabridged Pentium 4 IA32 Processor Genealogy
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The Agents in an Interrupt Message Transaction
Refer to Figure 61-36 on page 1595.
Figure 61-36. The IO APIC and Pentium® 4 Family Processors
MCH Initiates an Interrupt Message Transaction
When the MCH initiates an interrupt message transaction on the FSB (on behalf of the IO APIC or a device adapter), the transaction has the following characteristics:
The MCH acts as the transaction's Request Agent.
The transaction is a memory transaction but the snoop in the processor caches will result in a miss (because the Local APIC's register space is designated as UC in the MTRRs).
The only valid snoop results would be a miss (neither HIT# nor HITM# asserted), ...
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