The Request Phase Signal Group is Multiplexed

There is more transaction-related information to be output during the Request Phase than there are signals in the Request Phase signal group (see Figure 49-4 on page 1209). To address this problem, the same signal group is used to output the two packets that comprise the transaction request. Different information is output on these signals in each of the two packets.

Figure 49-4. A Transaction Request Consists of a Large Amount of Information

In some Intel® documentation, the information output in the two packets is referred to in the following manner:

  • The information output on the address (A[35:3]#) ...

Get The Unabridged Pentium 4 IA32 Processor Genealogy now with O’Reilly online learning.

O’Reilly members experience live online training, plus books, videos, and digital content from 200+ publishers.