July 2004
Intermediate to advanced
1744 pages
35h 3m
English
μops that read data from memory into a processor register are referred to as loads. μops that write to memory are referred to as stores.
The manner in which the processor handles a load or a store is defined by the type of memory being written to. When a memory data access is initiated, the 32-bit linear memory address is submitted to the DTLB and the Paging Unit to translate the linear address into a physical memory access. The physical memory address is submitted to the MTRRs to determine the memory type. In addition, the PTE or PDE selected by the linear address also defines the memory type. If there is a memory type conflict between the two, the processor makes its decision based on Table ...
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