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Engineering Digital Design
book

Engineering Digital Design

by Richard F. Tinder
January 2000
Intermediate to advanced content levelIntermediate to advanced
884 pages
29h 39m
English
Academic Press
Content preview from Engineering Digital Design
310 CHAPTER 7 / PROGRAMMABLE LOGIC DEVICES
FIGURE 7.13
Output macrocell for V-type PAL devices showing I/O connections and cell logic. Source: PAL Device
Data Book, Advanced Micro Devices, Inc., Sunnyvale, CA, 1992.
7.5 MIXED-LOGIC INPUTS TO AND OUTPUTS FROM
ROMs, PLAs, AND PAL DEVICES
The subject of mixed-logic inputs to decoders was discussed in Subsection 6.3.2. There,
two options were given for dealing with inputs that arrive both from positive and negative
logic sources. These input rules are necessary since the decoder is normally an IC chip with
no user access to its internal structure. Because ROMs, PLAs, and PALs also exist as IC
chips, the same ...
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Publisher Resources

ISBN: 9780126912951