Engineering Digital Design

362 CHAPTER 8 / ARITHMETIC DEVICES AND ARITHMETIC LOGIC UNITS (ALUs)

FIGURE 8.31

EV K-maps and minimum cover for carry propagate (P) and carry generate (G) parameters given in

Fig. 8.30.

capability. Here, the C

out

functions of Fig. 8.26 are replaced with those for carry propagate,

P, and carry generate, G, which are derived from Eqs. (8.2) and (8.7). Logic 0’s are placed

in the P and G columns for the logic operations to indicate false carry rejection, as was

done in the operation table of Fig. 8.26.

The design of the 1-bit slice ALU of Fig. 8.30 continues by plotting the P and G outputs in

second-order K-maps as was the case for C

out

in Fig. 8.27d.